/* ==========================================================================
 * Synopsys DesignWare Sensor and Control IP Subsystem IO Software Driver and
 * documentation (hereinafter, "Software") is an Unsupported proprietary work
 * of Synopsys, Inc. unless otherwise expressly agreed to in writing between
 * Synopsys and you.
 *
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 * any End User Software License Agreement or Agreement for Licensed Product
 * with Synopsys or any supplement thereto. You are permitted to use and
 * redistribute this Software in source and binary forms, with or without
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 * below, then you are not authorized to use the Software.
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 * ========================================================================== */
/*==========================================================================
 * Library DW_DFSS-2.1.13
 * ========================================================================== */

#ifndef CREG_MASTER_H_
#define CREG_MASTER_H_

/* Function: io_creg_master_read
 * Reads the content of CREG data control register that is current output of CREG bus
 *
 * Parameters:
 *   dev_id       Identifier of CREG master instance
 *   reg_val      Address that on successful function return contains the value stored in
 *                data control register
 *
 */
extern void io_creg_master_read(uint32_t dev_id, uint32_t *reg_val);

/* Function:  io_creg_master_write
 * Writes provided value to CREG data control register to be seen on CREG bus
 *
 * Parameters:
 *   dev_id       Identifier of CREG master instance
 *   reg_val      The value to be written to data control register.
 *
 */
extern void io_creg_master_write(uint32_t dev_id, uint32_t reg_val);

#endif              /* CREG_MASTER_H_ */
